UnIC: the Universal IC

Or, the un-integrated circuit. Or the not-so-unique IC. The options are endless.

Let me state the obvious, if you follow my posts on this site: I’m obsessed with retro computing lately. Dabbling in the field made me realize: many of these old machines are full of custom, out-of-production, hard-to-get chips. Certainly, you can still buy a brand new Z80 processor or a 6502. Try finding a new version of the ZX Spectrum ULA though, and you’ll hit some roadblocks.

There are several projects on the web to create replacements for these hard-to-find chips, using modern parts. Some use FPGAs. Others use an RP2040. Yet others are just breakout boards for modern-day, surface-mount counterparts. Heck, even I created a project like that!

Which gave me the idea: wouldn’t it be cool to have a single HW solution for all of these? Obviously it would need to be based on something programmable, such as an FPGA but if the board design can stay the same, it could be used and re-used for a multitude of projects. Thus, the universal IC, or UnIC was born.

Problem #1: form factor

This is something unavoidable: A single design has a single form-factor. At least until field morph-able circuit boards are invented.

Since the project aims at replacing integrated circuits, we’re looking at IC packaging. I choose to first tackle the most common one of the era: DIP-40. Both larger (up to 64-pins) and smaller (down to 8) existed in the DIP package family, but it seems that these hard-to-find, custom chips worth thinking about replacing came in only a few variants: 32, 40 or 48 pins. I’m thinking, if this projects gets off the ground, I can easily create all three variants. As a starting point, 40 pins seems a logical one.

Problem #2: power

This is a big one: the location of the power pins was not standardized. Still isn’t. Just taking a look at the Z80 and 6502 pinouts shows you two different variants:

FPGAs don’t help with that, power needs to be solved elsewhere. The solution came to me watching a video about the history of the ARM processor. I couldn’t find the link to the video, but here’s how the Ars write-up of the same story:

“In fact, one of the first test boards the team plugged the ARM into had a broken connection and was not attached to any power at all. It was a big surprise when they found the fault because the CPU had been working the whole time. It had turned on just from electrical leakage coming from the support chips.”


What is going on in this story? CMOS devices are very sensitive to ESD – zaps that can happen when you rub yourselves to nylon and then touch something metallic, such as a chip lead. To prevent accidental damage, all these devices contain ESD protection circuits inside:

Imagine ‘forgetting’ to apply power to the device, U1A in the example above. If the input is driven high, D1 will conduct and the input will power the circuit.

This of course is ill-advised, the ESD structures inside an actual integrated circuit are not sized for this kind of current. But the idea can still work: if I intentionally create a similar structure on every pin of my design, these diodes will connect power to power and ground to ground, independent of pins they happen to be.

Problem #3: level shifting

Nothing designed in the last – what seems like – infinite number of years can deal with the 5V logic levels of the days of Yore. The best you can hope for is 3.3V. This is not as bad as it sounds: 5V TTL logic is actually compatible with 3.3V CMOS logic levels, it’s just that they can drive the inputs all the way to 5V. The issue is again, those pesky ESD diodes, this time truly inside the device. Referring back to the previous image, imagine my 3.3V device being powered from a 3.3V voltage source. Now, imagine input getting connected to a 5V source. D1 would still get forward-biased, essentially trying to drive the power supply up to (close to) 5V. If it succeeds, it will power my modern 3.3V logic with something it can’t withstand. If it doesn’t, the diode will conduct a lot of current, something it is not designed to do. Either way, it’s bad news.

A level-shifter is called for. This circuit needs to be bi-directional, needs to be able to deal with weak pull-ups and pull-downs. Something, the TI TXS series was designed to do; which I completely forgot about when I was working on this circuit. Still, the solution I came up with is really close to what’s inside that chip:

The Input Stage

As I have said, I didn’t use the TXS series. I used a single MOSFET in the path. We shall see how well it works.

With the ‘ESD bypass’ and the level shifter, the diagram of the circuitry becomes the following:

Of course the protection diodes and the FET must be replicated for every pin, 40 altogether.

The gate-bias is set to about 4.5V, or one threshold voltage above the desired 3.3V limit voltage.

FPGA selection

On to selecting a the star of the show: the programmable element that’ll actually do the thing of being universal. This could either be something akin to the RP2040 or an FPGA. I went the FPGA route, partially because it seems more flexible and partially because the RP2040 doesn’t have enough programmable I/Os.

For FPGAs, there are several choices, though the field narrows down rather quickly: I need something small, that can be mounted on a PCB the size of a DIP40 package. That means that the package, including it’s pin footprint can’t be larger then 12mm on at least one of it’s dimensions. I’m also looking for something cheap and available but not necessarily terribly powerful.

I zeroed in on the GoWin GW1 series in the QN88 package. The prices on these parts are outrageous at Mouser, but I was given a great quote by one of the direct distributors. So all is good.

This chip has variants with built-in SDRAM or PSRAM; they have internal configuration memory, even some user-FLASH for non-volatile memory. Seemed like a great deal for the price.

A close second, something that I’m still considering is the Trion family from Efinix. This one has reasonable prices even from a distro, like Digikey. The benefits of this one over the GoWin solution is larger FPGA array and more flexible PLL configuration, however it comes in a BGA package (hard to deal with in a hobby setting), it has rather weird pinout in that LVDS pins are not multiplexed with regular GPIOs and it doesn’t come with built-in (SDRAM or FLASH) memories, which drives cost higher.

Rounding out the design, I need some power supplies and bias-setting circuitry.


The FPGA I selected has a few extra pins left over, after I used up what I needed for the DIP pins. What else would be useful/possible here?

I decided to include external memory (both FLASH and PSRAM) in the form of a QSPI interface. This is of course an option that I don’t have to populate, but it’s nice to have around.

I also added an FPC connector that can connect to an extension board. The idea is the following: let’s say one wants to use this design to not only replace, but improve upon the graphics chip in a Commodore 64. Let’s say one wants to add HDMI output! This of course won’t be possible within the confines of the original 40-pin chip pinout: those pins are all called for. Besides, the wiring of the original C64 PCB was done without HDMI in mind (big surprise), so even if those signals would be presented on the package pins, what would happen to them?

However, through this FPC connector, a small extension board with an HDMI connector can be added. This extension board could be mounted somewhere convenient in the case of the machine and the FPC would connect back to the UnIC chip, replacing the VIC-II.

Similar logic could apply to wanting to add – say – an extra serial port or an Ethernet interface to an existing design.


Mechanically, the PCB looks something like this:

It’s – well – a PCB of the size of a DIP-40 package. It doesn’t look anything like the chips it intends to replace. However, it’s easy to design a 3D-printed top cover that would make it look much more like the genuine article. Still though, most ICs have some sort of part number and manufacturer insignia engraved on them. Can I re-create that? In fact, since the function of the ‘chip’ is dynamic, based on the downloaded FPGA image, wouldn’t it be nice if the decal on the package could be dynamic as well? Can I include a screen?

Yes, yes I can. It’s not cheap, but such small OLED screens exist and it so happens that I have enough spare pins on the FPGA that I can hook one of them up, using SPI.

Where is it in spacetime?

The project is published on GitHub: https://github.com/andrastantos/unic

It is in prototyping phase, which is to say that some things are working, but there’s a lot of work left to do. I intend to report project status and interesting things I’m learning throughout development on these pages.

If you are interested in engaging with the project, please contact me! I would be more than happy to incorporate feedback and – thought it might be a tad too early for that – would love to see people start using the device for all sorts of interesting project.

On that note, I’m thinking about starting a Kickstarter campaign mostly to gauge interest in a project like this. To that end, any and all feedback here would be also very welcome.

A word from our Sponsor

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