Introduction
In the previous two chapters about my ROM idea, I’ve made some progress towards describing how it should work and performed some experiments to ground my numbers a little.
In my long and winding mumblings about differential amplifiers, I also came up with a relatively decent two-stage design.
This time, I intend to adopt that differential amplifier to the ROM sense amplifier problem as well as figure out the necessary muxing scheme to make things work.
Let’s define our problem
In order to make things work fast, I’ll need to use photo diodes to detect the light in the ROM. Photo transistors are simply not fast enough. Photo diodes however have very weak output. My estimation is that I’ll have to deal with about 50nA (!) of photo current from the sensors. I can get that maybe an order of magnitude higher (by a combination of higher LED currents, multiple LEDs and several photo diodes in parallel), so maybe 500nA is achievable. Still, I’ll keep my target at 50nA, if possible.
This is obviously a mighty problem and I have no idea what chances I have to make a circuit that can actually achieve that level of sensitivity. However, if I can’t come up with a circuit that does that in simulation, I have no hope to get there in reality either.
Speed-wise, I want to get a read cycle going in 500ns. That includes address decode, LED matrix delay, output delay, etc. I’m going to budget about 300ns for all of that. This means that the light will be on for about 200ns, at the end of which I want to see a reliable readout.
Input muxing
I plane to have a 64×64 ROM matrix. That means a total of 64 photo diodes (or sets of diodes if I need to have more of them for each row in parallel).
The output of the ROM is 16-bit wide so each column (selected by illuminating an LED) contains four words. The sense amplifiers are going to be large and expensive, I don’t want to have one for each row. I have to have one for each output bit though, that’s obvious. So, I have to down-select the 64 photo diodes into the 16 sense amplifiers on the input. I have to have a 4:1 input mux. This mux is something that acts on the raw photo-current from the photo-diodes: 50nA or so. To give you an idea of how low that is, the base-current for many of my amplifier stages is measured in 10s of uA, and that’s a current that I habitually ignore.
Input stage
Before we look at muxing more closely, let’s talk about a different problem: I can’t really attach (I don’t think) a photo diode directly to my differential amplifier. I need to de-couple if somehow. The circuit I came up with is a two-stage driver: a common-base stage followed by a common-emitter one. The common-base stage actually provides some (around 10dB) voltage amplification, but that’s not it’s main purpose in life. It is a current-follower, providing a low input impedance that the photo-diode likes for noise reasons. Its output impedance is high though, which is not what the sense amplifier wants. So, an emitter follower stage in between does the impedance conversion without any additional gain.
A short note: I’m using opto-couplers to represent the optical path, reducing the LED current to the point where the associated photo-current is what I expect to see: 50nA. This is the easiest way I could come up with to add a somewhat realistic input to my simulation models.
If I drive this thing with a train of 200ns light pulses, I get this response:
Another short note: you see how low these signal levels are in the jaggedness of the curves: we’re really pushing the precision limits of LTSpice. To get even to this level, I had to specify the maximum time-step (I set it at 5ns); the default value was not good enough. At any rate, you see the roughly 50nA input pulse and a 12uV (peak) output pulse. That’s 0.012mV!
Now, back to input muxing: I decided to replicate the common-base stage for each photo diode and switch them on/off by tying their base to GND or VCC respectively. This seems to work well in simulation, we shall see how well it works in reality. This is what it looks like:
You see how three of the four input transistors have their base at ground, only one, the top one, tied to VCC. The output looks like this now:
I captured all four photo-currents just to show that only one of them effects the output.
Will this hold up in real life? I don’t know, but at least it works in LTSpice. That’s a decent start.
Noise
This is a later update, after I finished the article. I figured out how to do noise analysis with LTSpice and the results are not terribly nice. The input stage (the common-base stage in particular) is rather noisy, adding about 1nV/sqrt(Hz) of noise to the system. This corresponds to about 9uV of noise in the 10MHz bandwidth we care about. Compare that to the signal level at that point, which is 12uV. Not good. Not good at all. That’s an SNR of a mere 2.5dB. I’m wrecking my brain on how to improve this, but in the end of the day, this might be the limiting factor, requiring me to up the photo current requirement by at least somewhat.
Tweaking of components yields some improvement: by increasing the 300 ohm pull-up to 1k increases voltage gain by 10.5dB, while the noise only increases by about 7dB. So the resulting SNR should improve by 3.5dB to about 6dB. Still not great, but maybe acceptable? At least the corresponding reduction in bandwidth doesn’t seem to be horrible: the input stage still has the -3dB point at around 12MHz, which is higher than what the subsequent amplifier can do. This won’t be the limiting factor, I don’t think.
Amplifier
The schematic is absolutely invisible in this page, so please click on it to see the full version. This will lead you to the SVG file, which you can zoom in and out and follow the discussion…
What you see here is a four-stage differential amplifier. The total gain is 1,000,000, or 120dB in theory. In practice, it is a bit lower; around 110dB (differential gain), or 104dB single-ended:
The bandwidth is around 12.5MHz, which is pretty respectable for something built out of less than 20 transistors. Certainly sufficient to faithfully recreate 200ns wide input pulses:
On this chart you see the input current pulse (red), the output of the diff-amp (green) and the logic output at the end (blue).
The turn-on delay is around 50ns, the turn-off delay is around 70ns.
The last stage of the diffamp is ground-referenced, the first three is between +15 and -15V. Each stage is de-coupled by an emitter-follower from the next one. This is important to maintain high bandwidth. Even the last stage is loaded by an emitter-follower, this time as part of the final, digital inverter.
The last stage is special in another way: it’s bias current is very precisely controlled and temperature-compensated. This is important to make sure the output common-mode voltage is well maintained and temperature-independent. This allows the inverter (used as a slicer in this case) to work reliably. You can see how well all the parameters (both gain and offset) are held over the full temperature range:
I tried to document the design process by parametrizing the component values in the schematic as much as possible. You’ll see very few magic values are entered manually. Now, the downside of this is that the resistor values are certainly not standard ones. I don’t even know what they are, as they are computed by LTSpice on the fly. So, once they are “quantized” to the available values, some change in performance is to be expected.
One thing to note: the bias current for each of the first three stages is set by a simple resistor (R16, R18, R26). This is a very cheap, but crude way of setting the bias current. Importantly, their value depends not only on the desired bias current, but the input common mode voltage to their stage. Since the whole design is DC coupled, that means the previous stages output common mode voltage. Except for the first stage of course. Normally this is bad practice: you don’t want the operating point of your amplifier depend on the input common mode. However, in this particular application it’s not a problem: the input common mode is set by the reverse-bias voltage of the photo-diodes, which is VCC. There is a Vbe drop there due to the emitter follower, but that’s a detail. The point is, the input common mode voltage is well controlled and known.
Power supply rejection
This is something I haven’t looked at before: how much can we reject noise from the power supplies? For this test, we need to disconnect the inputs (I also disconnected the output inverter to make the outputs completely symmetrical) and inject a since wave to one of the power supplies. We look at how much of that sine wave shows up on the output. Since on the output, we’re using only one of the outputs, the single-ended output is what we care about. So, here’s the result for the positive supply:
Then for the negative supply:
It’s not surprising that we’re much more sensitive to the negative supply: the last stage has a proper current source, while the rest use a resistor as a “current source”, which is obviously sensitive to supply current changes.
Finally, here’s the dependency on VCC:
This one is a bit surprising: I would have thought that powering the most sensitive nodes (the photo diodes and the muxing circuit) from VCC would turn out to be a major problem.
Given that our gain is ~100dB, we want noise sources to be significantly below that, say 130dB. The cross-over point for V+ is 10kHz. In other words, the power supply filter needs to become active at around the 10kHz mark. Here’s the filter I came up with:
The ferrite used is this:
And the corresponding updated PSRR graph:
The negative supply would need filtering from 1kHz up, which needs different components:
It uses a different ferrite as well:
I will have to play around with this a little as there are two problems: the 470uF capacitors are large and the resulting PSRR curve is still borderline:
Lastly comes VCC, which needs filtering beyond 1MHz. Using the same filter as for V+ results in the following PSRR curve:
Now, let’s see the combined impact of all three power supplies:
I think I can live with that. Now, here is the rub: to get this kind of noise spectrum, one would need 1V supply voltage disturbance on all three power supplies. That’s highly pessimistic. VCC almost certainly won’t have that, given it’s a 3.3V supply. Even V+ and V- are unlikely to be that noisy. At the same time, this is a very sensitive circuit, so I can’t afford to be hand-wavy about these things. If all these measurements pan out in reality though, I think my major noise source is not going to be power.
One thing, I have to be careful: the VCC filter needs to be just for the input stages. If the output inverter is powered from the same node (after the filter), there’s enough feedback from this inverter to the input to make the whole amplifier unstable. This is a learning, I’m glad I ran into. It would have been all too easy to make this mistake in the final system.
Parting words
This is a relatively short article, a surprising result considering how much time it took me to arrive at this circuit. I didn’t want to bore you with the details of arriving at it, or re-live all the misery of the process to be honest.
Could the circuit be simplified? For instance, could I get away with a three-stage amplifier? Maybe. I don’t care. This circuit will get replicated only 16 times, the savings is not worth the effort. Plus, the current topology has some headroom in it. Should the need arise, that flexibility is worth the extra few cents it costs me.
One thing is clear though: even though this design is based on the circuit I came up with for the core sense amplifier, it’s not the same. So, sharing a single PCB is not going to be possible. It’s another module to design and pay for. That’s life, I’ve made my peace with it. I’m still contemplating if the core amplifier and the tape read amplifier are close enough to warrant a single, combined design. Maybe. At the same time, the tape amplifier is only replicated four times, so maybe the win there is not enough to work too hard on that goal. I’ll think about that.
Next time around, I’ll look at the ROM LED driver circuitry, which I think is the last large missing piece of the design. Hopefully after that, I can start detailed work on the various modules and getting my hand dirty (and maybe burned) by the soldering iron.
Till than, be good and sleep well!
